I was born in a little log hospital in Seattle, Washington eons ago. After a typical first 18 years split between Seattle suburbs and the mean streets of Los Angeles, I graduated from Seattle's Shorecrest High School and enrolled at Washington State University in Pullman. Five years later, after obtaining a B.S in Zoology and my teaching certification, I worked at WSU in the Air Pollution Laboratory. My work included stratospheric ozone studies in Alaska and ambient hydrocarbon measurements in such vacation spots as Houston, a barnyard in Missouri, and the sand dunes of Tampa. Further duties included driving overloaded trailers across the US, assaulting unarmed weather towers, and chasing and catching runaway vans full of instruments in Jacksonville, Illinois. My air pollution career reached its zenith while molesting trees with Teflon bags to measure pollution from trees. It was also during this time that I met my wife, Margaret Faler, albeit not in a tree or a Teflon bag.
However, with the new decade and a new wife, I felt an urge for a calmer life. In 1983, I finished a second BS, in Computer Science. That Fall, we loaded a U-Haul and headed for Fort Collins, Colorado, where Peggi and I attended Colorado State's graduate school.
In 1991, we left for Houghton, Michigan with two cats in tow so that I could pursue my career as a Michigan Technological University CS faculty member while my wife earned her Ph.D. in Rhetoric. In 1992, I earned my Ph.D. from Colorado State University and, in 1998, became an Associate Professor of Computer Science.
However, I felt a need for industrial experience if I were to be more aware of practical issues of building compilers. So, in August 2000, we moved to Dallas with our "family" of six cats to labor at Texas Instruments where I worked on TI's compiler for DSP processors. Currently, one cat condescends to live with us as long as we tend to our responsibilities as household staff. However, after three years and missing academia, I joined the UNT CSE faculty as an Associate Professor.
I have focused my research on compiler optimization for architectures with instruction-level parallelism (ILP). Initially, I worked on the Horizon compiler, retargetable for a wide variety of "bit slice" architectures. At MTU, I continued developing Rocket, a highly-optimizing retargetable C compiler for ILP architectures. Currently, while continuing work in scheduling and register assignment for ILP architecture, I am addressing compiler optimization issues related to 1) using scratchpad memory either in place of cache or in conjunction with cache and 2) hybrid architectures that include both fixed-processor cores and reconfigurable logic.
I have more than 35 refereed publications in these and related research areas. During my academic career at MTU and now UNT, I have been either PI or co-PI on more than $4.5 million in funded grants.